Accelerating Binarized Convolutional Neural Networks with Software-Programmable FPGAs [Conference Paper]

NESL Technical Report #: 2017-2-1

Authors:

Publication Forum: International Symposium on Field-Programmable Gate Arrays (FPGA)

Date: 2017-02-27

Public Document?: Yes

NESL Document?: Yes

Document category: Conference Paper

Primary Research Area: #<ResearchArea:0x007f58cfdfbd60>

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