Embedded Systems Introduction

    [Edwards97] Edwards, S.; Lavagno, L.; Lee, E.A.; Sangiovanni-Vincentelli, A. Design of embedded systems: formal models, validation, and synthesis. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.366-90. 137 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Tennenhouse00] Tennenhouse, D. Proactive computing. Communications of the ACM, vol.43, (no.5), ACM, May 2000. p.43-50.
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    [Wolf94] Wolf, W.H.; O'Donnell, R. Hardware-software co-design of embedded systems (and prolog). Proceedings of the IEEE, vol.82, (no.7), July 1994. p.965-89.
http://ielimg.ihs.com/iel1/5/7241/00293155.pdf

Computation Models & Specification

    [Benveniste91] Benveniste, A.; Berry, G. The synchronous approach to reactive and real-time systems. Proceedings of the IEEE, vol.79, (no.9), Sept. 1991. p.1270-82. 24 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Berry98] Berry, Gerard. Foundations of Esterel. In Proof, Language and Interaction: Essays in Honour of Robin Milner, 1998. http://citeseer.nj.nec.com/62412.html
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    [Dasarathy85] Dasarathy, B. Timing constraints of real-time systems: constructs for expressing them, methods of validating them. IEEE Transactions on Software Engineering, vol.SE-11, (no.1), Jan. 1985. p.80-6. 13 references.
    [Douglass98] [Douglass98] Douglass, B.P. State machines and statecharts. Embedded Systems Conference West, 1999. http://www.ilogix.com/dev/SMS.zip
    [Edwards97] Edwards, S.; Lavagno, L.; Lee, E.A.; Sangiovanni-Vincentelli, A. Design of embedded systems: formal models, validation, and synthesis. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.366-90. 137 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Edwards03] Edwards, Stephen A. Design Languages for Embedded Systems. Computer Science Technical Report CUCS-009-03, Columbia University. http://www1.cs.columbia.edu/~sedwards/papers/edwards2003design.pdf
    [Eker03] Eker, Johan; Janneck, Jörn W.; Lee, Edward A.; Liu, Jie; Liu, Xiaojun; Ludvig, Jozsef; Neuendorffer, Stephen; Sachs, Sonia; Xiong, Yuhong. Taming Heterogeneity---the Ptolemy Approach. Proceedings of the IEEE , v.91, No. 2, January 2003. http://ptolemy.eecs.berkeley.edu/publications/papers/03/TamingHeterogeneity/
    [Gupta97] Gupta, R.K.; Liao, S.Y. Using a programming language for digital system design. IEEE Design & Test of Computers, vol.14, (no.2), IEEE, April-June 1997. p.72-80.
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    [Harel87] Harel, D. Statecharts: a visual formalism for complex system. Science of Computer Programming, vol.8, (no.3), June 1987. p.231-74. 33 references.
    [Harel90] Harel, D.; Lachover, H.; Naamad, A.; Pnueli, A.; Politi, M.; Sherman, R.; Shtull-Trauring, A.; Trakhtenbrot, M. STATEMATE: a working environment for the development of complex reactive systems. IEEE Transactions on Software Engineering, vol.16, (no.4), April 1990. p.403-14. 22 references. 
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    [Harel96] Harel, D.; Naamad, A. The STATEMATE semantics of statecharts. ACM Transactions on Software Engineering and Methodology, vol.5, (no.4), ACM, Oct. 1996. p.293-333.
http://www.acm.org/pubs/articles/journals/tosem/1996-5-4/p293-harel/p293-harel.pdf
    [Harel97] [Harel97] Harel, D.; Gery, E. Executable object modeling with Statecharts. IEEE Computer, July 1997. p. 31-42. Available on INSPEC.
    [Hoare83] Hoare, C.A.R. Communicating sequential processes. Communications of the ACM, vol.26, (no.1), Jan. 1983. p.100-6. 20 references.
    [Kodosky91] Kodosky, J.; MacCrisken, J.; Rymar, G. Visual programming using structured data flow. Proceedings. 1991 IEEE Workshop on Visual Languages (Cat. No.91TH0402-8), (Proceedings. 1991 IEEE Workshop on Visual Languages (Cat. No.91TH0402-8), Kobe, Japan, 8-11 Oct. 1991.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1991. p.34-9.
http://ielimg.ihs.com/iel2/376/6139/00238853.pdf
    [Lee95] Lee, E.A.; Parks, T.M. Dataflow process networks. Proceedings of the IEEE, vol.83, (no.5), May 1995. p.773-801. 97 references.
http://ielimg.ihs.com/iel1/5/8651/00381846.pdf
    [Lee01] Lee, E.A.; Embedded Software. UCB ERL Memorandum M01/26.
http://ptolemy.eecs.berkeley.edu/publications/papers/01/embsystems/embsystems.pdf
    [Lee02] Lee, E.A.; Embedded Software. To appear in Advances in Computers (M. Zelkowitz, editor), Vol. 56, Academic Press, London, 2002. http://ptolemy.eecs.berkeley.edu/publications/papers/02/embsoft/
    [Liao97] Liao, S.; Tjiang, S.; Gupta, R. An efficient implementation of reactivity for modeling hardware in the Scenic design environment. Proceedings 1997. Design Automation Conference, 34th DAC, (Proceedings 1997. Design Automation Conference, 34th DAC, Proceedings of 34th Design Automation Conference, Anaheim, CA, USA, 9-13 June 1997.) New York, NY, USA: ACM, 1997. p.70-5.
    [Lyons98] Lyons, A. UML for real-time overview. ObjectTime Limited / Rational Software whitepaper, 1998. 
    [Milner90] Milner, R.; Operational and Algebraic Semantics of Concurrent Processes, in Handbook of Theoretical Computer Science - Volume B: Formal Methods and Semantics (ed.  J. van Leewen), The MIT Press/Elsevier, Cambridge, MA / Amsterdam, Netherlands, 1990.
    [Mosses90] Mosses, P.D.; Denotational Semantics, in Handbook of Theoretical Computer Science - Volume B: Formal Methods and Semantics (ed.   J. van Leewen), The MIT Press/Elsevier, Cambridge, MA / Amsterdam, Netherlands, 1990.
    [Passerone98a] Passerone, C.; Passerone, R.; Sansoe, C.; Martin, J.; Sangiovanni-Vincentelli, A.; McGeer, R. Modeling reactive systems in Java. Proceedings of the Sixth International Workshop on Hardware/Software Codesign (CODES/CASHE'98) (Cat. No.98TB100232), (Proceedings of the Sixth International Workshop on Hardware/Software Codesign (CODES/CASHE'98) (Cat. No.98TB100232), Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98), Seattle, WA, USA, 15-18 March 1998.) Los Alamitos, CA, USA: IEEE Comput. Soc, 1998. p.15-19. vii+151 pp. 11 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Selic98a] Selic, B. Using UML for modeling complex system architectures. ObjectTime Limited / Rational Software slides, 1998. http://www.objectime.com/otl/technical/using_uml.ppt
    [Selic98b] Selic, B.; Rumbaugh, J. Using UML for modeling complex system. ObjectTime Limited / Rational Software whitepaper, 1998. http://www.objectime.com/otl/technical/umlrt.pdf
    [Selic99] Selic, B. Turning clockwise: using UML in the real-time domain. Communications of the ACM, vol. 42, no. 10, October 1999. pp. 46-54.
    [Sgroi00] [Sgroi00] Sgroi, M.; Lavagno, L.; Sangiovanni-Vincentelli, A. Formal models for embedded system design. IEEE Design & Test of Computers, vol.17, (no.2), IEEE, April-June 2000. p.14-27. Available on INSPEC.
    [Vahid95] Vahid, F.; Narayan, S.; Gajski, D.D. SpecCharts: a VHDL front-end for embedded systems. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, (no.6), June 1995. p.694-706. http://ielimg.ihs.com/iel1/43/8792/00387730.pdf

Design Methodology & Tools

    [Andrade998] Andrade, H.A.; Kovner, S.; Software Synthesis from Dataflow Models for G and LabVIEW. Proceedings of the 32nd annual Asilomar Conference on Signals, Systems and Computers, Pacific Grove, CA, USA, November 1998. http://www.ece.utexas.edu/~bevans/professional/asilomar98/hugo-scott.pdf
    [Balarin99] Balarin, F.; Chiodo, M.; Giusto, P.; Hsieh, H.; Jurecska, A.; Lavagno, L.; Sangiovanni-Vincentelli, A.; Sentovich, E.M.; Suzuki, K. Synthesis of software programs for embedded control applications. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.18, (no.6), IEEE, June 1999. p.834-49.
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    [Bolsens97] Bolsens, I.; De Man, H.J.; Lin, B.; Van Rompaey, K.; Vercauteren, S.; Verkest, D. Hardware/software co-design of digital telecommunication systems. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.391-418. 64 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Chiodo94] Chiodo, M.; Giusto, P.; Jurecska, A.; Hsieh, H.C.; Sangiovanni-Vincentelli, A.; Lavagno, L. Hardware-software codesign of embedded systems. IEEE Micro, vol.14, (no.4), Aug. 1994. p.26-36. 14 references.   On-line [Article Image] available in Melvyl's INSPEC database.
    [Chiodo96] Chiodo, M.; Engels, D.; Giusto, P.; Hsieh, H.; Jurecska, A.; Lavagno, L.; Suzuki, K.; Sangiovanni-Vincentelli, A. A case study in computer-aided co-design of embedded controllers. Design Automation for Embedded Systems, vol.1, (no.1-2), Kluwer Academic Publishers, Jan. 1996. p.51-67. 21 references. PDF file available from Kluwer's web site.
    [Chou95a] Chou, P.H.; Ortega, R.B.; Borriello, G. The Chinook hardware/software co-synthesis system. Proceedings of the Eighth International Symposium on System Synthesis (IEEE Cat. No.95TH8050), (Proceedings of the Eighth International Symposium on System Synthesis (IEEE Cat. No.95TH8050), Proceedings of the Eighth International Symposium on System Synthesis, Cannes, France, 13-15 Sept. 1995.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1995. p.22-7. xiii+175 pp. 22 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Chou95b] Pai Chou; Ortega, R.B.; Borriello, G. Interface co-synthesis techniques for embedded systems. 1995 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.95CB35859), (1995 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.95CB35859), Proceedings of IEEE International Conference on Computer Aided Design (ICCAD), San Jose, CA, USA, 5-9 Nov. 1995.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1995. p.280-7. xxviii+743 pp. 10 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Chou99] Pai Chou; Ortega, R.; Hines, K.; Partridge, K.; Borriello, G. IPCHINOOK: an integrated IP-based design framework for distributed embedded systems. Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), (Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), Proceedings 1999 Design Automation Conference, New Orleans, LA, USA, 21-25 June 1999.) Piscataway, NJ, USA: IEEE, 1999. p.44-9.
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    [Goossens97] Goossens, G.; Van Praet, J.; Lanneer, D.; Geurts, W.; Kifli, A.; Liem, C.; Paulin, P.G. Embedded software in real-time signal processing systems: design technologies. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.436-54. 97 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Gupta92a] Gupta, R.K.; De Micheli, G. System-level synthesis using re-programmable components. Proceedings. The European Conference on Design Automation (Cat. No.92TH0414-3), (Proceedings. The European Conference on Design Automation (Cat. No.92TH0414-3), Brussels, Belgium, 16-19 March 1992.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1992. p.2-7. xx+569 pp. 16 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Gupta92b] Gupta, R.K.; Coelho, C.N., Jr.; De Micheli, G. Synthesis and simulation of digital systems containing interacting hardware and software components. Proceedings. 29th ACM/IEEE Design Automation Conference (Cat. No.92CH3144-3), (Proceedings. 29th ACM/IEEE Design Automation Conference (Cat. No.92CH3144-3), Anaheim, CA, USA, 8-12 June 1992.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1992. p.225-30. xxvi+721 pp. 17 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Gupta93] Gupta, R.K.; De Micheli, G. Hardware-software cosynthesis for digital systems. IEEE Design & Test of Computers, vol.10, (no.3), Sept. 1993. p.29-41. 21 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Gupta94] Gupta, R.K.; Claudionor, N.C., Jr.; De Micheli, G. Program implementation schemes for hardware-software systems. Computer, vol.27, (no.1), Jan. 1994. p.48-55. 11 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Gupta96] Gupta, R.K.; De Micheli, G. A co-synthesis approach to embedded system design automation. Design Automation for Embedded Systems, vol.1, (no.1-2), Kluwer Academic Publishers, Jan. 1996. p.69-120. 47 references. PDF file available from Kluwer's web site.
    [Lavagno94] Lavagno, L.; Chiodo, M.; Giusto, P.; Jurecska, A.; Hsieh, H.; Yee, S.; Sangiovanni-Vincentelli, A.S.; Suzuki, R. A case study in computer-aided codesign of embedded controllers. Proceedings of the Third International Workshop on Hardware/Software Codesign (Cat. No.94TH0700-5), (Proceedings of the Third International Workshop on Hardware/Software Codesign (Cat. No.94TH0700-5), Third International Workshop on Hardware/Software Codesign, Grenoble, France, 22-24 Sept. 1994.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1994. p.220-4. ix+225 pp. 8 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Lavagno98] Lavagno, L.; Sangiovanni-Vincentelli, A. System-level design models and implementation techniques. Proceedings 1998. International Conference on Application of Concurrency to System Design (Cat. No.98EX108), (Proceedings 1998. International Conference on Application of Concurrency to System Design (Cat. No.98EX108), Proceedings 1998 International Conference on Application of Concurrency to System Design, Fukushima, Japan, 23-26 March 1998.) Los Alamitos, CA, USA: IEEE Comput. Soc, 1998. p.24-32. xii+295 pp. 10 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Leupers98] Leupers, R.; Marwedel, P. Retargetable code generation based on structural processor descriptions. Design Automation for Embedded Systems, vol.3, (no.1), Kluwer Academic Publishers, Jan. 1998. p.75-108. 68 references. PDF file available from Kluwer's web site.
    [Micheli97] De Micheli, G.; Gupta, R.K. Hardware/software co-design. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.349-65. 120 references.   On-line [Article Image] available in Melvyl's INSPEC database.
    [Passerone98b] Passerone, R.; Rowson, J.A.; Sangiovanni-Vincentelli, A. Automatic synthesis of interfaces between incompatible protocols. Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175), (Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175), Proceedings 1998 Design and Automation Conference. 35th DAC, San Francisco, CA, USA, 15-19 June 1998.) New York, NY, USA: IEEE, 1998. p.8-13.
http://ielimg.ihs.com/iel4/5854/15604/00724431.pdf
    [Paulin97] Paulin, P.G.; Liem, C.; Cornero, M.; Nacabal, F.; Goossens, G. Embedded software in real-time signal processing systems: application and architecture trends. Proceedings of the IEEE, vol.85, (no.3), IEEE, March 1997. p.419-35. 60 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Srivastava91] Srivastava, M.B.; Brodersen, R.W. Rapid-prototyping of hardware and software in a unified framework. 1991 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (91CH3026-2), (1991 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers (91CH3026-2), Santa Clara, CA, USA, 11-14 Nov. 1991.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1991. p.152-5. xxviii+578 pp. 14 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Srivastava95a] Srivastava, M.B.; Brodersen, R.W. System level hardware module generation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.3, (no.1), March 1995. p.20-35. 28 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Srivastava95b] Srivastava, M.; Brodersen, R.W. SIERA: a unified framework for rapid-prototyping of system-level hardware and software. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, (no.6), June 1995. p.676-93. 33 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Tuck97] Tuck, Barbara. Raise your sights to the system level. Computer Design, June 1997. Available as PDF file at http://computer-design.com/Editorial/1997/06/asic/697asdesrpt.html.
    [Vercauteren97] Vercauteren, S.; Lin, B. Hardware/software communication and system integration for embedded architectures. Design Automation for Embedded Systems, vol.2, (no.3-4), Kluwer Academic Publishers, May 1997. p.359-82. 30 references. PDF file available from Kluwer's web site.
    [Verkest96] Verkest, D.; Van Rompaey, K.; Bolsens, I.; De Man, H. CoWare-a design environment for heterogeneous hardware/software systems. Design Automation for Embedded Systems, vol.1, (no.4), Kluwer Academic Publishers, Oct. 1996. p.357-86. 18 references. PDF file available from Kluwer's web site.

Real-time Operating Systems 

    [Gay03] David Gay, Phil Levis, Rob von Behren, Matt Welsh, Eric Brewer, and David Culler. The nesC Language: A Holistic Approach to Networked Embedded Systems. Proceedings of Programming Language Design and Implementation (PLDI) 2003, June 2003.
    [Hill00] Jason Hill, Robert Szewczyk, Alec Woo, Seth Hollar, David Culler, Kristofer Pister. System architecture directions for network sensors. ASPLOS 2000.
http://webs.cs.berkeley.edu/tos/papers/tos.pdf
    [Katcher95] Katcher, D.I.; Kettler, K.A.; Strosnider, J.K. Real-time operating systems for multimedia processing. Proceedings Fifth Workshop on Hot Topics in Operating Systems (HotOS-V) (Cat. No.95TH8059), (Proceedings Fifth Workshop on Hot Topics in Operating Systems (HotOS-V) (Cat. No.95TH8059), Proceedings 5th Workshop on Hot Topics in Operating Systems (HotOS-V), Orcas Island, WA, USA, 4-5 May 1995.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1995. p.18-21. x+145 pp. 19 references.  On-line [Article Image] available in Melvyl's INSPEC database.

Scheduling

    [Balarin98] Balarin, F.; Lavagno, L.; Murthy, P.; Sangiovanni-Vincentelli, A.; Systems, C.D.; Sangiovanni-, A. Scheduling for embedded real-time systems. IEEE Design & Test of Computers, vol.15, (no.1), IEEE, Jan.-March 1998. p.71-82.
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    [Bhattacharyya99] Bhattacharyya, S.S.; Murthy, P.K.; Lee, E.A. Synthesis of embedded software from synchronous dataflow specifications. Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, vol.21, (no.2), Kluwer Academic Publishers, June 1999. p.151-66.
http://www.wkap.nl/art.pdf?issn=0922-5773&volume=21&page=151
    [Fisher91] Fisher, J.A.; Rau, B.R. Instruction-level parallel processing. Science, vol.253, (no.5025), 13 Sept. 1991. p.1233-41. 33 references.
    [Goyal96] Goyal, P.; Xingang Guo; Vin, H.M. A hierarchical CPU scheduler for multimedia operating systems. Operating Systems Review, vol.30, spec. issue., (Second USENIX Symposium on Operating Systems Design and Implementation (OSDI), Seattle, WA, USA, 28-31 Oct. 1996.) ACM, 1996. p.107-21.
http://citeseer.nj.nec.com/23979.html
    [Jeffay91] Jeffay, K.; Stanat, D., and Martel, C. On non-preemptive scheduling of periodic and sporadic tasks. In Proceedings of the 12 th IEEE Symposium on Real-Time Systems (December 1991), pp. 129--139.
http://citeseer.nj.nec.com/jeffay91nonpreemptive.html
    [Katcher95] Katcher, D.I.; Kettler, K.A.; Strosnider, J.K. Real-time operating systems for multimedia processing. Proceedings Fifth Workshop on Hot Topics in Operating Systems (HotOS-V) (Cat. No.95TH8059), (Proceedings Fifth Workshop on Hot Topics in Operating Systems (HotOS-V) (Cat. No.95TH8059), Proceedings 5th Workshop on Hot Topics in Operating Systems (HotOS-V), Orcas Island, WA, USA, 4-5 May 1995.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1995. p.18-21. x+145 pp. 19 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Lee87] Lee, E.A.; Messerschmitt, D.G. Static scheduling of synchronous data flow programs for digital signal processing. IEEE Transactions on Computers, vol.C-36, (no.1), Jan. 1987. p.24-35.
    [Lehoczky89] Lehoczky, J.; Sha, L.; Ding, Y. The rate monotonic scheduling algorithm: exact characterization and average case behavior. Proceedings. Real Time Systems Symposium (Cat. No.89CH2803-5), (Proceedings. Real Time Systems Symposium (Cat. No.89CH2803-5), Santa Monica, CA, USA, 5-7 Dec. 1989.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1989. p.166-71. http://ielimg.ihs.com/iel2/268/2318/00063567.pdf
    [Liu73] Liu, C.L.; Layland, J.W. Scheduling algorithms for multiprogramming in a hard-real-time environment. Journal of the Association for Computing Machinery, vol.20, (no.1), Jan. 1973. p.46-61.
    [Melkonian00] Melkonian, M.; Get by without an RTOS. Embedded Systems Programming, September, 2000. http://www.embedded.com/2000/0009/0009feat4.htm
    [Murthy97] Murthy, P.K.; Bhattacharyya, S.S.; Lee, E.A. Joint minimization of code and data for synchronous dataflow programs. Formal Methods in System Design, vol.11, (no.1), Kluwer Academic Publishers, July 1997. p.41-70.  http://ptolemy.eecs.berkeley.edu/papers/97/jointCodeDataMinimize/jfm.pdf
    [Paulin89] Paulin, P.G.; Knight, J.P. Force-directed scheduling for the behavioral synthesis of ASICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.8, (no.6), June 1989. p.661-79. On-line [Article Image] available in Melvyl's INSPEC database.
    [Rajkumar97] Rajkumar, R.; Lee, C.; Lehoczky, J.; Siewiorek, D. A resource allocation model for QoS management. Proceedings. The 18th IEEE Real-Time Systems Symposium (Cat.No.97CB36172), (Proceedings. The 18th IEEE Real-Time Systems Symposium (Cat.No.97CB36172), Proceedings Real-Time Systems Symposium, San Francisco, CA, USA, 2-5 Dec. 1997.) Los Alamitos, CA, USA: IEEE Comput. Soc, 1997. p.298-307.
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    [Rajkumar98]

 

Rajkumar, R.; Chen Lee; Lehoczky, J.P.; Siewiorek, D.P. Practical solutions for QoS-based resource allocation problems. Proceedings 19th IEEE Real-Time Systems Symposium (Cat. No.98CB36279), (Proceedings 19th IEEE Real-Time Systems Symposium (Cat. No.98CB36279), Proceedings Real-Time Systems Symposium, Madrid, Spain, 2-4 Dec. 1998.) Los Alamitos, CA, USA: IEEE Comput. Soc, 1998. p.296-306.
http://www.cs.cmu.edu/afs/cs/project/rtmach/public/papers/rtss98.ps
    [Ramamritham94] Ramamritham, K.; Stankovic, J.A. Scheduling algorithms and operating systems support for real-time systems. Proceedings of the IEEE, vol.82, (no.1), Jan. 1994. p.55-67. On-line [Article Image] available in Melvyl's INSPEC database.
    [Rau93] Ramakrishna Rau, B.; Fisher, J.H.A. Instruction-level parallel processing: history, overview, and perspective. Journal of Supercomputing, vol.7, (no.1-2), May 1993. p.9-50. 235 references.
    [Sha90] Sha, L.; Rajkumar, R.; Lehoczky, J.P. Priority inheritance protocols: an approach to real-time synchronization. IEEE Transactions on Computers, vol.39, (no.9), Sept. 1990. p.1175-85. http://ielimg.ihs.com/iel1/12/2066/00057058.pdf
    [Sha94] Lui Sha; Rajkumar, R.; Sathaye, S.S. Generalized rate-monotonic scheduling theory: a framework for developing real-time systems. Proceedings of the IEEE, vol.82, (no.1), Jan. 1994. p.68-82. 28 references. http://ielimg.ihs.com/iel1/5/6554/00259427.pdf
    [Stankovic95] Stankovic, J.A.; Spuri, M.; Di Natale, M.; Buttazzo, G.C. Implications of classical scheduling results for real-time systems. Computer, vol.28, (no.6), June 1995. p.16-25. 28 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Waldspurger94]

Waldspurger, C.A.; Weihl, W.E. Lottery scheduling: flexible proportional-share resource management. Proceedings of the First USENIX Symposium on Operating Systems Design and Implementation (OSDI), (Proceedings of the First USENIX Symposium on Operating Systems Design and Implementation (OSDI), Proceedings of 1st Symposium on Operation Systems Design and Implementation, Monterey, CA, USA, 14-17 Nov. 1994.) Berkeley, CA, USA: USENIX Assoc, 1994. p.1-11. 280 pp.
http://citeseer.nj.nec.com/waldspurger94lottery.html

Real-time Communciations

    [Lahiri01]
Lahiri, K.; Raghunathan, A.; Lakshminarayana, G. LOTTERYBUS: A new high-performance communication architecture for system-on-chip designs. Proceedings of the 38th ACM Design Automtion Conference, 2001.
http://esdat.ucsd.edu/~klahiri/papers/lottery.pdf
http://portal.acm.org/citation.cfm?id=378252&coll=portal&dl=ACM&CFID=475080&CFTOKEN=82957713
 

Performance Estimation and Analysis

    [Li97] Li, Y.-T.S.; Malik, S. Performance analysis of embedded software using implicit path enumeration. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.16, (no.12), IEEE, Dec. 1997. p.1477-87.

Behavioral Synthesis

    [Goossens95] Goossens, G.; Lanneer, D.; Pauwels, M.; Depuydt, F.; Schoofs, K.; Kifli, A.; Cornero, M.; Petroni, P.; Catthoor, F.; de Man, H. Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures. Journal of VLSI Signal Processing, vol.9, (no.1-2), Jan. 1995. p.49-65. 43 references.
    [Lin97] Youn-Long Lin. Recent developments in high-level synthesis. ACM Transactions on Design Automation of Electronic Systems, vol.2, (no.1), ACM, Jan. 1997. p.2-21. 100 references. Available as PDF file at http://www.acm.org/pubs/articles/journals/todaes/1997-2-1/p2-lin/p2-lin.pdf.
    [McFarland90] McFarland, M.C.; Parker, A.C.; Camposano, R. The high-level synthesis of digital systems. Proceedings of the IEEE, vol.78, (no.2), Feb. 1990. p.301-18. 92 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Rabaey91] Rabaey, J.M.; Chu, C.; Hoang, P.; Potkonjak, M. Fast prototyping of datapath-intensive architectures. IEEE Design & Test of Computers, vol.8, (no.2), June 1991. p.40-51. 18 references. On-line [Article Image] available in Melvyl's INSPEC database.

Debugging & Testing

    [Kirovski97] Kirovski, D.; Potkonjak, M. A quantitative approach to functional debugging. 1997 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.97CB36142), (1997 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.97CB36142), Proceedings of IEEE International Conference on Computer Aided Design (ICCAD), San Jose, CA, USA, 9-13 Nov. 1997.) Los Alamitos, CA, USA: IEEE Comput. Soc, 1997. p.170-5. xxvi+767 pp. 12 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Potkonjak95a] Potkonjak, M.; Dey, S.; Roy, R.K. Considering testability at behavioral level: use of transformations for partial scan cost minimization under timing and area constraints. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, (no.5), May 1995. p.531-46. 39 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Potkonjak95b] Potkonjak, M.; Dey, S.; Roy, R.K. Behavioral synthesis of area-efficient testable designs using interaction between hardware sharing and partial scan. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.14, (no.9), Sept. 1995. p.1141-54. 44 references. On-line [Article Image] available in Melvyl's INSPEC database.

Imprecise Computation

    [Liu94] Liu, J.W.S.; Wei-Kuan Shih; Kwei-Jay Lin; Bettati, R.; Jen-Yao Chung Imprecise computations. Proceedings of the IEEE, vol.82, (no.1), Jan. 1994. p.83-94. 26 references.  On-line [Article Image] available in Melvyl's INSPEC database.

Low-Power and Power-Aware Systems

    [Benini00] Benini, L.; Bogliolo, A.; De Micheli, G. A survey of design techniques for system-level dynamic power management. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol.8, (no.3), June 2000. p.299-316.
    [Benini01] Benini, L.; Castelli, G.; Macii, A.; Scarsi, R. Battery-driven dynamic power management. IEEE Design & Test of Computers, vol.18, (no.2), IEEE, March-April 2001. p.53-60.
    [Gruian01] Gruian, F. Hard real-time scheduling for low-energy using stochastic data and DVS processors. Proceedings of the 2001 ACM International Symposium on Low power electronics and design, August 2001. p.46-51.
    [Martin99]

Thomas Martin and Daniel Seiwiorek, "Non-Ideal Battery Behavior and Its Impact on Power Performance Trade-offs in Wearable Computing," Proceedings of the 1999 International Symposium on Wearable Computers, San Francisco, CA, October 18-19, 1999; pp. 101-106.
http://www.ece.vt.edu/~tlmartin/papers/nonideal_formatted.pdf
    [Raghunathan01] Raghunathan, V.; Spanos, P.; and M. Srivastava. Adaptive power-fidelity in energy aware wireless embedded systems. Proceedings of the IEEE Real-Time Systems Symposium, December 2001. http://nesl.ee.ucla.edu/pw/NESL/rtss2001_VR.pdf
    [Raghunathan02] V. Raghunathan, C. Schurgers, S. Park, and M. Srivastava, "Energy-aware Wireless Microsensor Networks," IEEE Signal Processing Magazine, March 2002. p. 40-50.
    [RaghunathanYYa]

V. Raghunathan, C. Pererira, M.B. Srivastava, and R.K. Gupta. Energy-aware Wireless Systems with Adaptive Power-Fidelity Trade-offs. Submitted to IEEE Transactions on VLSI Systems.
http://nesl.ee.ucla.edu/pw/NESL/Submitted/J26_200X_tvlsi.pdf
    [RaghunathanYYb] V. Raghunathan, S. Ganeriwal, C. Schurgers, and M.B. Srivastava. Energy Efficient Wireless Packet Scheduling and Fair Queuing. Submitted to ACM Transactions in Embedded Computing Systems.
http://nesl.ee.ucla.edu/pw/NESL/Submitted/J27_200X_tecs.pdf
    [Rakhmatov03] D. Rakhmatov, S. Vrudhula, and D. Wallach, “A model for battery lifetime analysis for organizing applications on a pocket computer”, IEEE Transactions on VLSI, to appear. http://nesl.ee.ucla.edu/pw/ee202a/rakhmatov-tvlsi-2003.pdf
    [Schurgers02] C. Schurgers, V. Raghunathan, and M.B. Srivastava. Power Management for Energy-aware Communication Systems. Accepted for ACM Transactions on Embedded Computing Systens.
http://nesl.ee.ucla.edu/pw/NESL/Accepted/J22_200X_tecs.pdf
    [Simunic01] Simunic, T.; Benini, L.; Glynn, P.; De Micheli, G. Event-driven power management. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol.20, (no.7), IEEE, July 2001. p.840-57.
    [Singh95] Singh, D.; Rabaey, J.M.; Pedram, M.; Catthoor, F.; Rajgopal, S.; Sehgal, N.; Mozdzen, T.J. Power conscious CAD tools and methodologies: a perspective. Proceedings of the IEEE, vol.83, (no.4), April 1995. p.570-94. 126 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Yao95] Yao, F.; Demers, A.; Shenker, S. A scheduling model for reduced CPU energy. Proceedings of IEEE 36th Annual Foundations of Computer Science, Milwaukee, WI, USA, 23-25 Oct. 1995.. p.374-82.

Soft Real-time Systems

    [Adelberg94] Adelberg, B.; Garcia-Molina, H.; Kao, B. Emulating soft real-time scheduling using traditional operating system schedulers. Proceedings. Real-Time Systems Symposium (Cat. No.94CH35728), (Proceedings. Real-Time Systems Symposium (Cat. No.94CH35728), Proceedings Real-Time Systems Symposium, San Juan, Puerto Rico, 7-9 Dec. 1994.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1994. p.292-8. x+299 pp. 4 references. On-line [Article Image] available in Melvyl's INSPEC database.
    [Kao94] Kao, B.; Garcia-Molina, H. Subtask deadline assignment for complex distributed soft real-time tasks. Proceedings of the 14th International Conference on Distributed Computing Systems (Cat. No.94CH3450-4), (Proceedings of the 14th International Conference on Distributed Computing Systems (Cat. No.94CH3450-4), 14th International Conference on Distributed Computing Systems, Pozman, Poland, 21-24 June 1994.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1994. p.172-81. xix+651 pp. 15 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Kao95] Kao, B.; Garcia-Molina, H.; Adelberg, B. On building distributed soft real-time systems. Proceedings of the Third Workshop on Parallel and Distributed Real-Time Systems, (Proceedings of the Third Workshop on Parallel and Distributed Real-Time Systems, Proceedings of Third Workshop on Parallel and Distributed Real-Time Systems, Santa Barbara, CA, USA, 25 April 1995.) Los Alamitos, CA, USA: IEEE Comput. Soc. Press, 1995. p.13-19. x+205 pp. 8 references.  On-line [Article Image] available in Melvyl's INSPEC database.
    [Kao97] Kao, B.; Garcia-Molina, H. Deadline assignment in a distributed soft real-time system. IEEE Transactions on Parallel and Distributed Systems, vol.8, (no.12), IEEE, Dec. 1997. p.1268-74. 12 references. On-line [Article Image] available in Melvyl's INSPEC database. Also, available as PDF file at http://dlib.computer.org/td/books/td1997/pdf/l1268.pdf

Transformations

    [Bacon94] Bacon, D.F.; Graham, S.L.; Sharp, O.J. Compiler transformations for high-performance computing. ACM Computing Surveys, vol.26, (no.4), Dec. 1994. p.345-420.  On-line copy available in Melvyl's INSPEC database. Availabale as PDF file at http://www.acm.org/pubs/articles/journals/surveys/1994-26-4/p345-bacon/p345-bacon.pdf
    [Potkonjak94] Potkonjak, M.; Rabaey, J. Optimizing throughput and resource utilization using pipelining: transformation based approach. Journal of VLSI Signal Processing, vol.8, (no.2), Oct. 1994. p.117-30. 61 references.
 
Contact: Mani Srivastava (mbs@ee.ucla.edu)